1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to a semiconductor memory device including an on die termination circuit and an on die termination method thereof.
2. Description of the Related Art
Generally, a semiconductor memory device is a storage device for storing data and, if necessary, the stored data is read. Semiconductor memory devices can be largely classified as random access memory (RAM) or read only memory (ROM). The RAM is a volatile memory device in which stored data is lost when power is turned off. The ROM is nonvolatile memory device in which stored data is retained even if power is turned off. RAM includes dynamic RAM (DRAM), static RAM (SRAM), etc. The ROM includes programmable ROM (PROM), erasable PROM (EPROM), electrically EPROM (EEPROM), flash memory, etc.
The semiconductor memory device receives a signal from the outside through a pad. The semiconductor memory device includes an on die termination ODT circuit terminating a data line for an impedance matching. The ODT circuit increases signal integrity by controlling signal reflection using a termination resistance device.
A conventional on die termination circuit has a predetermined termination resistance value regardless of phase change. The termination resistance value of the on die termination circuit is determined by a value stored on a mode register MRS during an initial operation. However, the conventional on die termination circuit cannot always effectively deal with inter symbol interference (ISI) according to various phase changes because of always having a predetermined termination resistance value.
For example, it will be assumed that a data phase is a first case (low-high-low-high) or a second case (low-low-low-high). Termination resistance values of the first case and the second case are identical, but an influence of the ISI is different. Since the influence of the ISI is different, the first case and the second case have different signal transmission characteristics to each other. This causes window characteristics of an effective input signal to be decreased.
That is, the conventional semiconductor memory device determines the termination resistance value of the on die termination circuit by a value stored in a mode register during an initial operation. Accordingly, there is a problem that the conventional semiconductor memory device cannot deal with the ISI influence.